The intern will be responsible for all aspects of physical design and implementation of Graphics processors, integrated chipsets, and other ASICs targeted at the desktop, laptop, workstation, set-top box and home networking markets.
NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? If so, we want to hear from you.
What You Will Do
- As a member of the team, you will participate in the efforts in establishing CAD and physical design methodologies (flow and tools development).
- Your day to day will include developing chip floor plan, power/clock distribution, chip assembly and P&R, timing closure, power and noise analysis and back-end verification across multiple projects.
- This position requires you to work with EDA vendors such as Synopsys, Cadence, Ansys, Mentor, etc. We use tool suites such as - ICC2, PrimeTime, Redhawk-SC, DC shell, Innovus and Tempus and Virtuso.
- You will interact with a diverse team engineers.
Required Skills and Abilities
- Currently enrolled and pursuing a BSEE, MSEE or PhD.
- You have a minimum GPA 3.5.
- Have previous experience in physical design implementation.
- Deep understanding of Synthesis, static timing analysis, clock/power distribution and analysis, RC extraction and correlation, place and route, circuit design and analysis is required.
- Scripting and programming experience using several of the following: Perl, C, C++, TCL, Scheme, Python, Skill and Make.
- Knowledge of EDA tools like ICC2, PrimeTime, Redhawk-SC, Innovus and Tempus is a plus.
- You are a meticulous organizer with an ever positive, can-do attitude.
- Consistently demonstrate out-of-box thinking for creative solutions to highly sticky problems.
- You are fun and hardworking teammate who enjoys a challenge and celebrates success.
- Job type:Internships
Santa Clara (United...
- Closing Date:29th Sep 2020, 6:00 pm